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Intel® High Definition Audio Specification Document Change Notification

This document discloses changes to the Intel® High Definition Audio Specification and all information contained herein is provided under the terms of the ”AZALIA” SPECIFICATION DEVELOPMENT AGREEMENT” also known as Intel® High Definition Audio Specification Developer Agreement, and all the terms of such agreement, including the confidentiality provisions, shall apply to this disclosure.

Controller Interrupt Enable and Global Interrupt Enable persistence in Controller Reset

This DCN clarifies the intention of the High Definition Audio Specification to permit Controller implementations that let the Codec generate a processor interrupt when there is a status change event in the codec and the Controller is in Reset in the D0 power state. In some Controller implementations the CIE and GIE bits that gate all interrupts in the controller are not cleared by Controller Reset. This behavior lets the Code Wake Interrupt propagate to the processor but it is not clear this is allowed by the current High Definition Audio Specification.

Read the full Intel® High Definition Audio Specification Document Change Notification.